Radio frequency transponders (often referred to as RFID transponders or tags) may be classified in a number of ways including: operating frequency, the coupling mechanism with the antenna, and how the transponder is powered. In some types of transponder an auxiliary power supply may be present, and in others power may be solely derived from an impinging electro-magnetic field. Transponders may be classified as passive, semi-passive or active, depending on how they are powered. Passive transponders draw their operating power completely from the impinging magnetic or electro-magnetic field. In case of semi-passive transponders the core of the transponder is supplied with power by external means (not dependent on the impinging magnetic or electro-magnetic field), and the energy for communication between transponder and a fixed reader station or interrogator is carried by the impinging field. Active transponders utilize energy from an external supply for communicating with the interrogator.
Referring to the operating frequency, low frequency (LF), high frequency (HF) and ultra-high frequency (UHF) transponders may be distinguished. Communication and power supply of LF tags (which may operate predominantly at 125 kHz or 134 kHz) and HF transponders (typically centred at 13.56 MHz) are normally based on direct magnetic coupling between a coil of a reader device and the transponder. UHF transponders (which may use carrier frequencies around 900 MHz or 2.4 GHz) typically extract the supply power from the radiated field of a reader and communicate by modulating the effective radar cross-section of the transponder. In contrast to LF and HF transponders, which are matched by using a simple parallel resonance circuit to a coil, UHF transponders typically possess a true resonant antenna. In most cases the antenna is a dipole structure, which is directly matched to the input impedance of the transponder integrated circuit (IC). In both cases (LF/HF and UHF) the impinging field and therefore the available power may vary significantly. In consequence, a voltage regulator is required to stabilize the internal supply voltage at a specific level. A shunt voltage regulator is typically used, which shunts excess voltage and dissipates the excess energy.
For communicating with the reader, LF and HF transponders employ load modulation, which means the devices change the quality factor of a resonant coil circuit, modulating the quality factor in correspondence with the data stream. To achieve a detectable amplitude of back-modulation at low field strength, the quality factor and therewith the input voltage amplitude at a given DC load of the transponder IC must not fall below a certain threshold. A maximum tolerable voltage may be determined by the IC technology used in the transponder. The window between the minimum voltage amplitude and the maximum tolerable voltage amplitude may be relatively narrow (e.g.: approximately 2.5 V to 3.6 V). The voltage regulator therefore is a critical component with respect to the overall performance of LF and HF frontends. A large number of different circuit topologies for shunt regulators are known (see for instance U.S. Pat. No. 5,045,770, U.S. Pat. No. 5,874,829, U.S. Pat. No. 613,413, U.S. Pat. No. 7,703,677, U.S. Pat. No. 7,929,265 and US 2008/0180224).
In principle, two forms of implementations of shunt regulator for LF and HF applications can be distinguished in the prior art, as shown in simplified form in FIG. 1, denoted by A and B. In both circuits there is a coil 3, connected to an AC side of a rectifier 2. A load resistor RL represents the circuit supplied by the DC side of the rectifier 2. In both cases an active load transistor 1 is used in a control loop to directly regulate a DC output of the rectifier 2. In case A the transistor 1 is placed at the DC side of the rectifier 2 and in case B, directly at the AC input of the rectifier 2. As indicated in FIG. 1, the active load device in CMOS implementations is typically an N-type transistor 1 (NMOST). In these examples, a differential amplifier 4 provides a positive bias signal to the NMOST 1 when the DC output voltage VDD from the rectifier 2 exceeds a reference voltage Vref.
The rectifier structure found in most implementations, unlike that indicated in FIG. 1, may be a hybrid type using a cross-coupled pair of transistors as pass devices with regard to chip ground. In consequence the negative swing relative to ground may be small in relation to the overall input amplitude.
The pass devices of the rectifier 2 with respect to the positive supply VDD could be ordinary PN diodes or Schottky diodes, but in most cases are MOS transistors in diode configuration, hence with shorted gate-drain nodes. Referring to circuit A in FIG. 1 it can be seen that the complete excess current is passed though the rectifier 2. Although relatively high RMS currents may occur at maximum field strength (for instance 40 mA at a field strength of 7.5 A/m) the difference between regulated DC voltage level and AC amplitude at the coil caused by the voltage drop at the rectifying devices does usually not exceed 1 V due to the non-linear characteristic of the pass devices of the rectifier 2. In circuit version B the voltage drop is even smaller, as the excess current is shunted directly at the coil terminal (before it reaches the rectifier 2).
In the case of UHF transponders, in contrast to LF and HF transponders, a low quality (Q) factor at minimum DC load is desirable to allow a broadband impedance matching of antenna and IC. In general, a Q factor in the range of 15 may be appropriate, corresponding to a bandwidth of larger than 150 MHz at UHF frequencies. At a typical effective load current of about 5 μA for a read operation at a DC supply of 1 V and an equivalent parallel input capacitance between 500 fF and 1 pF, the associated minimum input RF amplitude at the frontend to achieve this Q factor may typically be below 300 mV. The power conversion between the required low input RF amplitude and the DC supply in the range of 1 V is typically accomplished by a charge-pump circuit with multiple stages. A simplified circuit diagram of a known single ended UHF power conversion unit (PCU) 10 including antenna 15, electro static discharge (ESD) structures 11, Dickson charge-pump 12 and shunt regulator 13 is shown in FIG. 2. Additionally the modulating transistor 14 for modulating the antenna response is shown, which may, in an alternative arrangement, be integrated into the ESD protection structures 11.
Differential frontends typically may use Dickson like circuits, or may use cross-coupled bridge type charge-pumps. In a differential frontend, the ESD structures 11 and modulating transistor 14 as depicted in FIG. 2 are typically connected in a differential implementation in mirrored form with respect to the chip ground.
Unlike in the case of the rectifiers used for LF and HF devices the pass devices of the charge-pumps in UHF transponders are not directly connected to the input RF node, but instead need to be coupled capacitively (i.e. via a capacitor) thereto. In UHF devices, DC side voltage regulators are predominantly employed, and the shunted excess current is limited in consequence by the size of the coupling capacitors for a given input power. The input voltage amplitude therefore rises significantly with increasing input power.
As the amplitude reaches a certain limit, the anti-parallel ESD diodes 11 and ground-connected MOS-transistors found at the RF side of the charge pump 12 start to dissipate additional excess power. Ground connected transistors may be associated with the modulator circuitry 14, and may also be present in the ESD protection circuit. In CMOS implementations, such transistors are typically NMOS transistors. Despite the strong non-linear characteristic of these devices, the voltage amplitude observed at a maximum operating input power of 20 dBm may still reach 1 V.
State of the art UHF RFID ICs are based on CMOS technologies featuring minimum channel lengths of around 140 nm. Typical maximum operating voltages of such MOS devices lie in the range of 1.8 V. With progressing technology and decreasing minimum feature size, maximum voltage ratings decrease. For example, for 90 nm and 40 nm technologies operating voltage limits of around 1.3 V and 1.2 V have to be considered. In single-ended frontends, although such reduced limits may still lie above the estimated clamping voltage of 1 V provided by anti-parallel ESD diodes, the margin is substantially decreased. For differential frontends, due to the series connection of two diodes between the symmetrical RF nodes, the clamping voltage is approximately doubled and the voltage limits might be exceeded. In order to maintain the desired specifications on maximum operating power the voltage-limiting structures associated with differential PCUs have to be changed when moving to advanced technologies.
Furthermore, the hard clamping behaviour of the ESD diodes 11 is disadvantageous, because it results in the generation of higher order harmonics. These may result in harmonic modulation of the effective area of the antenna 15, which is undesirable. This problem applies to both differential and single-ended frontends.
A known solution to enhance the voltage limiting arrangement of FIG. 2 is to use a NMOS active load connected directly at the RF terminal with a positive control voltage, as already described in conjunction with HF frontends.
FIG. 3 shows a UHF transponder frontend 20, comprising a UHF antenna 21. In the single ended arrangement of FIG. 3, one terminal 21b of the antenna 21 is grounded. The signal from the non-grounded antenna terminal 21a provides the RF input RFA to an RF input rail 27 of the frontend 20. An ESD protection circuit 22 is included, comprising a pair of anti-parallel ESD protection diodes 11 connected between a ground rail 28 and the RF input rail 27. A modulating transistor 14 is connected between the RF input rail 27 and ground 28. The gate of the modulating transistor 14 is connected to a data input terminal 23, so that the characteristics of the antenna 21 are modulated in accordance with the data signal 23. A voltage limiter 24 comprising an NMOS limiting transistor 1 is connected between the RF rail 27 and the ground rail 28.
A positive bias voltage VbN is provided for the NMOS limiting transistor 1. The positive bias voltage VbN controls the source-drain current through the limiting transistor 1. In some arrangements the active-load device might be incorporated in the ESD circuit 22.
The arrangement incorporates however a major disadvantage, which can be identified considering the transient voltage and current characteristics shown in FIG. 4, which shows a plot of the RF input voltage 41 with respect to time compared to the source drain current through the limiting transistor 1. Source drain currents for bias voltages of 0 V, 0.6 V and 1 V are shown in curves 42, 43 and 44 respectively.
During the positive half wave of the RF input voltage 41 the potential between gate and ground node of the limiting transistor 1 corresponds to the gate source voltage of the limiting transistor 1. This voltage can be assumed to be fixed during one period. In consequence the limiting transistor 1 is either non-conductive at all or is driven increasingly towards a saturation region of operation with rising amplitude. During the negative half wave the potential difference between the RF node and the gate determines the effective gate source voltage. As the negative input voltage swing increases the limiting transistor 1 gets progressively more conductive causing the strongly asymmetrical current waveforms 44, 43 and 42 shown in FIG. 3. It is notable that this behaviour may also be observed if no limiting transistor is present. In this case during the negative half-wave any virtually ground-connected NMOS devices present in the modulator 14 (for example) provide the primary shunt path. Considering only the individual RF nodes with reference to ground, the NMOS dominated structure does not behave symmetrically. This imbalance has the inevitable effect that at higher voltage amplitudes the DC potential at the RF input node rises with respect to chip ground. The ground connected NMOS structures behave as a parasitic charge-pump.
FIG. 4 simplifies the RF voltage waveform 41 as an ideal sine wave, which does not realistically reflect the behaviour at an UHF frontend since the antenna impedance is neglected. Nevertheless, the observed asymmetrical current flow characteristic through the NMOS limiting transistor is a real effect that occurs in operation. Voltage and current transients at the RF port are directly related to back-scattered signals from the antenna, so the asymmetrical behaviour as indicated by FIG. 4 may cause significant harmonic radiation from the antenna 15 at higher input power levels. It also should be noted that UHF RFID transponders are subject to frequency regulation like standard RF devices, and such radiated harmonics may be particularly undesirable in this respect.
It is an object of the invention to overcome or ameliorate at least some of the above mentioned problems.